Homodyne receivers in which a radio frequency (RF) signal is downconverted using a single frequency conversion have become pervasive in many applications due to the reduced complexity of the RF components used to implement such systems. In comparison to a heterodyne receiver that downconverts a RF signal to an intermediate frequency (IF), filters the IF signal, and then performs one or more additional frequency conversions to downconvert the IF signal to baseband, a homodyne receiver may be implemented using a single frequency conversion stage, thereby eliminating one or more mixing and filtering stages and their associated circuitry.
One issue faced by homodyne mixers is self-mixing of the LO signal which may lead to significant DC offset voltages in the downconverted baseband signal. In some cases, the amplitude of these DC offset voltages may exceed the amplitude of the received signal in radio receivers. In such systems, the DC component at the output of the single conversion mixer is removed by using a highpass filtering network that includes a series capacitor used that blocks DC signals.
In systems in which the received baseband signal has appreciable low frequency content, the cutoff frequency of the DC blocking network may be selected to allow the low frequency content to pass. In some cases, the value of series DC blocking capacitor may be a relatively large value and occupy an appreciable amount of silicon and/or circuit board area.